Making computer memory secure again

01-09-2022
Last year, researchers discovered vulnerabilities in commonly used memory devices that potentially put users of any kind of computer at risk. So far, the efforts of vendors to implement security mechanisms inside the chips have been unsuccessful. Scientists of ETH Zurich and the National Centre of Competence in Research (NCCR) Automation have now developed a mechanism by which the security risks are mitigated.
CPU
Source: pixabay

Being hacked is a modern-day nightmare. But even if all steps to ensure protection against malicious software are taken, attacks can still exploit hardware vulnerabilities – like one that researchers recently discovered within Dynamic Random Access Memory (DRAM) chips. Industry efforts in mitigating this vulnerability have been unsuccessful. Researchers of ETH Zurich and the National Centre of Competence in Research (NCCR) Automation have therefore taken it upon themselves to solve the issue. They presented their results at the 2022 IEEE Symposium on Security and Privacy.

Hammering until it breaks

Michele
Michele Marazzi is a doctoral candidate at the Computer Security Group at ETH Zurich and a member of the NCCR Automation. Image: Courtesy of Michele Marazzi

The DRAM technology is based on storing data in capacitors. Due to the physical nature of capacitors, some charge is constantly leaked. The chips can, therefore, only store data temporarily and have to be refreshed frequently – over ten times per second. This is where the so-called “Rowhammer” attack take place: “Every time a row of memory chips is activated in order to be read out or written onto, it creates an electromagnetic coupling with the neighbor rows. This coupling can cause the capacitors in neighboring rows to leak charge faster. Frequently repeated activation – or rowhammering – causes so much charge leakage that the data can be corrupted in a matter of microseconds ”, ETH Zurich doctoral researcher and NCCR Automation member Michele Marazzi explains. Rowhammer is, therefore, a serious security vulnerability that affects smartphones, laptops and data servers.

“For the moment, such an attack still requires effort and is considered very sophisticated. But in the past years, the Rowhammer vulnerability has worsened to the point where normal users may start becoming targets of such attacks as well”, ETH Zurich doctoral researcher and NCCR Automation member Patrick Jattke says. DRAM vendors have tried to implement security mechanisms inside the DRAM chip. “Although the details of these implementations are kept secret, we were able to demonstrate that all these mitigations are unfortunately flawed”, Professor of Computer Security at ETH Zurich and NCCR Automation member Kaveh Razavi points out.

A challenging issue

Patrick Jattke
Patrick Jattke is a doctoral candidate at the Computer Security Group at ETH Zurich and a member of the NCCR Automation. Image: Courtesy of Patrick Jattke

“Implementing an in-DRAM mitigation is challenging because of the many constraints. It should be able to track more than a million memory operations for each possible memory address within fractions of a second, for example. The mitigation must also not require too much space on the chip to be useful. Otherwise, there would be no benefit in moving to smaller technology nodes”, Razavi says.

Previous Rowhammer mitigations, such as the so-called Target Row Refresh, are based on different circuits built into the memory. These can detect unusually high activation frequencies of particular rows and hence guess where an attack is being launched. As a countermeasure, a control circuit then refreshes the presumed victim row prematurely and hence forestalls possible bit errors.

Kaveh
Kaveh Razavi is a Professor of Compter Security at ETH Zurich and a member of the NCCR Automation. Image: ETH Zurich

“But these mitigations only protect against rather simple attacks, such as double-sided attacks, where two memory rows adjacent to a victim row are targeted. They can, however, still be fooled by more sophisticated hammering”, Marazzi explains. “The only way to implement a secure mitigation is to proactively refresh rows. By mathematically demonstrating the best possible attack pattern, our solution – which we named Principled yet Optimal In-DRAM Target Row Refresh, or ProTRR – allows us to do just that. Moreover, it enables us to obtain the optimal number of counters that will protect against any attack – therefore minimizing the necessary chip space.”

“ProTRR is also the first mitigation compatible with the refresh management command added in recent DDR5 devices. In addition, our design allows great flexibility: depending on the available resources — like chip area, power and extra refreshes, it can protect devices with different degrees of vulnerability”, Marazzi explains.

“With our solution, the computer memory of our electronic devices would be secure again – at least for the time being”, Razavi concludes.

 

Publication details: ProTRR: Principled yet Optimal In-DRAM Target Row Refresh, Michele Marazzi, Patrick Jattke, Flavien Solt and Kaveh Razavi, 2022 IEEE Symposium on Security and Privacy, 2022, DOI: 10.1109/SP46214.2022